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ADVANCED UNIVERSAL FPGA
TRANER (VVSM - 09) |
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 40 MHZ ADC INTERFACE
BOARD (VVSM-09#1) |
 Piggy
Backs (Daughter board) |
 USB
TO JTAG ADAPTER |
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The universal FPGA
trainer consist of a main board with many peripheral like
USB,Ethernet, Serial ports, Parallel Port, VGA port, Graphics LCD,
Switches, LED, ADC & DAC etc.
This motherboard has 4
Nos of high speed connectors for plugging the daughter boards,
whichcontains the FPGA of any manufacturers. Separate 2 Nos of 100
pin high speed connectorsprovided for hardware expansion as piggy
back boards. |
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Features
:
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Industry
standard interconnection
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10
/ 100 Mbps Ethernet
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USB
2.0 host peripheral |
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Two
RS232 ports
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One
connected at 9 pin D connector and another one connected at 5 pin
connector.
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Memory
Sub system
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8
MB × 16 Bit SDRAM
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32
MB × 16 Bit DDRRAM
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4MB
× 16 bit flash EEPROM
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256KB
I2C EEPROM
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Additional
Features
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One
240 ×128 graphics LCD |
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16
dip switches & discrete LED’s
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4
digit 7 segment LED Display
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4
× 4 matrix keyboard
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One
VGA Port at 15 pin D connector
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One
Parallel Port at 25 pin D connector for printer connection
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One
PS2 connector for keyboard and mouse.
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Reset
Switch |
I2C
Real time Clock |
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One
piezo buzzer
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One
5V relay
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2
kg stepper motor interface
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Analog
Input & Output
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2MSPS
SPI ADC (12 Channel)
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800
ns SPI DAC ( 2 Channel) |
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Temperature
sensor interface
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One
16 bit stereo CODEC
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| JTAG
configuration |
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2
Nos of 100 pin high speed connectors provided for hardware
expansion can be
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used as hardware bus.
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Multiplayer
board for superior signal integrity
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54
I/O pins terminated at 3 Nos of 20 pin FRC connector for external
interfacing.
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USB
Host and Peripheral Interfacing
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USB host and peripheral
Implementation through Cypress CY67300 device.
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One
USB peripheral port at full speed (12 Mbps)
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2
Host USB ports for connecting to USB Peripheral (Printers/Keyboard
/Camera etc / Pen Drive for any other USB Peripheral)
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Full
driver software provided to the pen drive.
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One
IDE Connector for interfacing hard disk
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Full
Driver software for HDD
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40 MHZ ADC INTERFACE
BOARD (VVSM-09#1)
[TOC] |
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Add-on
Card for Advance FPGA Trainer (VVSM-09)
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| ADC |

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2 Channel, single ended Analog voltage
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Sampling
rate is 40 MSPS
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Resolution
: 12 Bits
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The
input signal can be given either through a low frequency
differential ADC driver or a high frequency driver transformers.
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The
input signals are terminated at SMA connectors.
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| DAC |
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2 Channel
current output DAC
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Resolution :
14 bitsz
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125 MSPS
update time
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Settling
time : 30 ns
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Output range
: -2.5V to +2.5V
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DAC outputs
are terminated at SMA connectors
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