Software IP Core

The following hardware IC's VHDL Code (IP) have been developed and made it available to students. The students can modify or add more features to the existing IC features. For example, you can add 16 bit Timer to 8255 core.

8255 Software IP Core in VHDL

8279 Software IP Core in VHDL

32 Bit Timer / Counter

8253 Software IP Core in VHDL

PWM Generation for Power Electronics Applications

8255 Software IP Core in VHDL [TOC]

The C-8255 core is the VHDL model of the Intel™ 8255 Programmable Peripheral Interface device designed for use in Intel microcomputer systems. It reduces the external logic normally needed to interface peripheral devices. Its function is that of a general purpose I/O component to interface peripheral equipment to the microcomputer system bus.

Features :

Functionally based on the Intel 8255A device

Three 8-bit peripheral ports: PA, PB, PC

Three programming modes for peripheral ports
      i. Basic input/output mode.
      ii. Strobed input/output mode.
      iii. Bi-Directional bus mode.

Total of 24 programmable I/O lines

8-bit bi-directional system data bus with standard microprocessor interface controls

Direct bit set/reset capability, easy control application interface.
Add On Board Features :

50 pin header to interface the board with µp / µc.

Zip socket is provided to verify 8255 IP Core.

8279 Software IP Core in VHDL [TOC]

The C-8279 Core is the VHDL model of the Intel™ 8279 Programmable Keyboard/Display Interface device designed for use with Intel microprocessors. The keyboard portion provides a scanned interface to 64-contact key matrix while the display portion provides an interface for popular display technologies (e.g. LED).

Features :

	Functionally based on the Intel 8279 device.
	Simultaneous keyboard display operations.
	Scanned keyboard and sensor modes.
	Strobed input entry mode.
	8-character keyboard FIFO.
	2-key lockout or N-key rollover with contact debounce.
	Dual 8- or 16-numerical display.
	Single 16-character display RAM.
	Programmable scan timing and mode.
	Interrupt output on key entry.
	Complete simulation of 8279 Simultaneous keyboard display operations 8 character FIFO 2 key lock out or N - key roll over with contact debounce. 6 Numeric and character display.

8279 Simulation Module [VVSI-22]

	50 pin header to interface the board with Microprocessor & Microcontroller.
	4 × 4 matrix keyboard.
	6 digit 7 segment LED display.
	One ZIF socket provision for testing the functions of a Intel 8279 IC.
	To check the simulation functions the Output downloadable file will be given.
	Sample source code will be given for keyboard & Display file will be given.
	Sample source code will be given for keyboard & Display

32 Bit Timer / Counter [TOC]

Features :

	6 Channel 32 bit timer / counter.
	Start with a preset value and count Up / Down
	Capture the 32 bit count value by Software command / Hardware signal.
	Enable or Disable count by Software command / Hardware signal.
	Status register bits is set, when threshold value is reached and counter overflows after reaching ...FFH while counting Up and ..00H while counting down.
	Clear the content of the Counter by Software / Hardware signal.
	Recommended Hardware: VVSM-07, VVSI-01 & VVSI-02

8253 Software IP Core in VHDL [TOC]

Features :

	3 Channel 16 bit timer / counter.
	Input clock from DC to 2 MHz.
	Programmable counter modes.
	Count Binary or BCD.

8253 Simulation Board:

	XilinxXC3S500E - FT256 Spartan 3E FPGA
	500K gates & 10,476 Logic cells
	FPGA configuration through JTAG
	Complete Simulation of 8253
	3 Channel Decrement Counter
	50 pin header to interface the board with Microprocessor/ Microcontroller
	One NCNO Switch is provided to give the manual clock.
	One ZIP Socket provision for testing the functions of a INTEL 8253IC.
	Sample source code will be given.

Note: 8253 IP Protocol is verified by interfacing with Intel 8051 or Philips 89C51 Microcontroller or any of our VXT bus interface connector.

PWM Generation for Power Electronics Applications [TOC]

Implementation of Event Manager Modules(EVA & EVB)

consists of

Two General Purpose (GP) Timers.

Three Compare Units, Three Capture Units.

Event Manager Interrupt Logic.

PWM Circuits

Speed & Resolution is high

Can be interfaced to a powerful 32 bit Embedded controller or

a DSP Processor.

RECOMMENDED HARDWARE

1. VPE-SPARTAN 3 FPGA CONTROLLER

This board is specially designed for Power Electronics applications, based on the latest FPGA Spartan-3 family, XC3S400-4PQ208 of 400K gates. The board comes with high speed 12-bit ADC & DAC for closed loop control. This will be a useful FPGA development board for Power Electronics & Dries Applications.

12-Channel, 12 bit serial ADC:

Dual 12 bit ADC using AD7266.

Each ADC offers 6 channel single-ended Or 3 channel

Differential inputs

2 Channel simultaneous sampling.

8-Channel, 12-bit serial DAC (AD5328)

PWM, Capture and GPIO lines.

8 Nos of I/O lines of the FPGA are used as PWM output

lines.

6 Nos of I/O lines of the FPGA are used as 6 capture inputs

for interfacing Encoder.

8 Nos of I/O lines of the FPGA can be used as General-

purpose I/O Lines.

I2C based key pad & LCD display.

A separate board with,

4 × 4 keys keypad for select , Increment, Decrement,

Reset functions.

16 × 2 alphanumeric LCD Display to select the program

as well as to display the firing angle, etc.,

Configuration

Slave serial and JTAG Mode

Onboard Serial Flash PROM XCF025.

Drives Power Module connectivity

One 34 Pin header is provided to terminate PWM

output and capture Inputs.

One 26 Pin header is provided for the ADC input signals.



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