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VLSI
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XILINX
BASED STANDALONE TRAINER KITS
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XILINX CPLD
STANDALONE TRAINER KIT
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XILINX
FPGA STANDALONE TRAINER KIT
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ALTERA FPGA TRAINER
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XILINX CPLD
STANDALONE TRAINER KIT
[TOC]
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Cool
Runner Development Kit (VVSM-05)
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Features
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 128 Macro Cell
XCR3128XL Cool Runner
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Xilinx CPLD. |
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16
Inputs using dip
switches.
16 outputs with LED indication.
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Two
Nos 7 segment display.
20x4 LCD Display.
Built-in
1149.9 JTAG interface.
User
selectable clock frequency[ 1 to 100 MHz].
4
× 4 Matrix Keyboard.
25
pin D type connector for printer interface.Two 10 pin connectors provided to interface our Add-on
cards.
Compatible with Xilinx ISE Foundation /
Web PACK Software.
Parallel cable is provided for down loading.
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XILINX
FPGA STANDALONE TRAINER KIT
[TOC] |
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1.Spartan
3 FPGA Main Board (VVSM-07)
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Features
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Device :
XC3S400 - 4PQ208.
400K gate
Xilinx Spartan 3 device.
Upto 137 user I/Os.
JTAG and serial mode
configuration facility.
Can be used with a variety of add-on cards
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(Switches, LEDs,
7-Segment, SRAMetc).
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Onboard Programmable
oscillator [1 to 100 MHz].
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Termination : All pins are terminated at 8
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Nos. of 20
Pin Connector.
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Compatible with Xilinx ISE Foundation /
Web
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PACK
Software.
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Parallel cable is provided for down loading.
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2.Xilinx Spartan 3E FPGA Trainer Kit
(VSK - Spartan 3E)
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Features
:
Xilinx XC3S500E
– FT256 Spartan 3E FPGA
500K gates & 10,476 Logic cells
16 Nos of digital input using slide switches
16 Nos of digital outputs using discrete LEDs
One Reset switch
FPGA configuration through
JTAG port
Slave serial
Onboard Flash Prom XCFO4S
Support for xilinx Parallel cable IV
Cashew jacket for 5V power supply
Total 190 I/O pins : 80 pins used for integrating peripheral like LED, Switches etc.,balance 110 pins available to user
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3 Nos of 20 pin header to interface VLSI based experiment modules (3.3V compatible).
1 No of 26 pin header to interface VLIM cards like Traffic Light Controller (5V compatible)
On board programmable PLL oscillator from 3MHz to 200 MHz
6 Nos of 7 segment LED display (to display Hr, Min, Sec of RTC VHDL implementation)
2 Nos of 100 pin header with 110 I/O pins terminations provided to plug in daughter boards.
Housed in a sleek plastic cabinet with built in SMPS 5V/2A.
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Additional Add-on Features
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Header provided in VSK-Spartan 3E to interface the following
16 × 2 LCD interface.
4 × 4 matrix keyboard.
Relay interface.
Stepper motor interface.
ADC & DAC interface.
2 ADCs of 3 MSPS each, 12 bit resolution
Anti aliasing filters at ADC input
8 Channel, 12 Bit DACs
Reconstruction filters at the DAC output
RS232 / SPI Serial Port
Temperature sensor interface
USB 2.0 Complaint interface (480 Mbits/sec)
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ALTERA FPGA TRAINER
[TOC]
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Cyclone FPGA Trainer [VVSM-04]
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Features
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Device:
EPIC6Q240C8 (Cyclone Family).
100K usable
gates.
Upto 180 user I/O Pins.
32 Input
switches & 24 output LEDs.
2 Nos. of 7 segment Display.
Byte
blaster MV cable
1 No. of
20 × 4 LCD Module.
2 Keys for Clock and Reset.
JTAG Configuration
facility.
Software:
Altera
Quartus II Web edition software compatible.
All 180 I/O pins are either
used for on board peripheral interface like switches, LEDs, LCD etc
and also terminated at 8 groups of 20 pin header, selectable by
jumpers.
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Optional
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On board 1 Mbit Serial PROM to configure the FPGA.
Byte
blaster II cable
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